1. Field of the Invention
The present invention relates to a semiconductor package, and more specifically, to a structure of heat-dissipating semiconductor package for reducing package warpage.
2. Description of the Prior Art
In the field of the semiconductor package, in order to protect the semiconductor chips, the insulating material, such as the molding encapsulation body, would be formed around the chips for encapsulating the chips. Referring to FIG. 1, a conventional semiconductor package 100 includes a substrate 110, a chip 120, an encapsulation body 130, a chip adhesion layer 160 and a plurality of solder balls 170. The substrate 110 has an inner surface 111. The chip 120 is disposed on the inner surface 111 of the substrate 110 and a plurality of solder wires 122 are utilized for electrically connecting the chip 120 and the substrate 110. The encapsulation body 130 is formed on the inner surface 111 of the substrate 110. When the semiconductor package 100 works in the operation of high frequency and high efficiency, the chip 120 of the semiconductor package 100 would generate heat. Referring to FIG. 2, in the condition that the size of the substrate 110 is 12 cm×12 cm, the package warpage of the semiconductor package 100 is approximate +20 μm when the thermal expansion coefficients of all the package devices of the semiconductor package 100 reach equilibrium.
In order to improve the efficiency of heat dissipation, installing a heat sink at the semiconductor package is proposed. Referring to FIG. 3, a conventional heat-dissipating semiconductor package 200 includes not only the aforementioned semiconductor package 100, but also a heat sink 250 with good heat-dissipating metal material such as copper. The heat sink 250 is adhered to the top surface 131 of the encapsulation body 130 through an adhesive layer 251. Besides the influence of the thermal expansion coefficients of the primary package devices, the thermal expansion coefficient of the heat sink 250 also influences the package warpage of the heat-dissipating semiconductor package 200. This is because the mismatch between the thermal expansion coefficient of the heat sink 250 and the thermal expansion coefficients of the other package devices of the heat-dissipating semiconductor package 200 is more significant, and therefore the thermal stress is generated between the heat sink 250 and the encapsulation body 130, such that serious package warpage would occur at the heat-dissipating semiconductor package 200. Referring to FIG. 4, when the thermal expansion coefficients of the primary package devices (such as the semiconductor package 100 shown in FIG. 1) of the heat-dissipating semiconductor package 200 reach equilibrium, the package warpage of the heat-dissipating semiconductor package 200 further installed with the heat sink 250 would be changed to −89 μm.
Therefore, after installing the heat sink at the semiconductor package, the problem of mismatch between the thermal expansion coefficients is more significant. Further, when the size of the heat sink is bigger, the thermal stress between the periphery of the heat sink and the periphery of the encapsulation body is greater, which results in that the package warpage of the semiconductor package is such serious that the solder balls connecting problem is caused. Thus, when installing any kind of heat sink at the semiconductor package, the thermal expansion coefficients of all the package devices of the semiconductor package need to be adjusted over and over again.